Please use this identifier to cite or link to this item: http://archive.cmb.ac.lk:8080/xmlui/handle/70130/3256
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dc.contributor.authorWijesinghe, W.A.S.
dc.contributor.authorJayananda, M.K.
dc.contributor.authorSonnadara, D.U.J.
dc.date.accessioned2012-12-19T04:57:30Z
dc.date.available2012-12-19T04:57:30Z
dc.date.issued2006
dc.identifier.citationProceedings of the Technical Sessions, Institute of Physics Sri Lanka, 22 (2006) 25-36
dc.identifier.urihttp://archive.cmb.ac.lk:8080/xmlui/handle/70130/3256-
dc.description.abstractRandom numbers are used in a wide variety of applications. True random number generators are slow and expensive for many applications while pseudo random number generators (RNG) suffice for most applications. Although a majority of random number generators have been implemented in software level, increasing demand exists for hardware implementation due to the advent of faster and high density Field Programmable Gate Arrays (FPGA). FPGAs make it possible to implement complex systems, such as numerical calculations, genetic programs, simulation algorithms etc., at hardware level. This paper discusses in detail the hardware implementation of several RNGs and their characteristics. Somewhat complex Cellular Automata based RNGs show slightly improved performance compared to the simplest Linear Feedback Shift Register RNG.
dc.language.isoenen_US
dc.subjectRandom numbers
dc.subjectFPGA
dc.titleHardware Implementation of Random Number Generatorsen_US
dc.typeResearch paperen_US
Appears in Collections:Department of Physics

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